NCT7491RQR2G【PDF 50/80 页】IC REMOTE THERMAL MONITOR 24QSOP

收藏本站

您好，
买卖IC网欢迎您。
请登录
免费注册

买卖IC网

Sheet目录45

46页 47页 48页 49页 [50页]51页 52页 53页 54页

NCT7491

http://onsemi.com

Table 51. TEMPERATURE READING REGISTERS (PowerOn Default = 0x80) (Notes 10, 11, 12)

R/W

Description

0x25

Remote 1 temperature reading (Notes 12, 13) (8 MSB of reading).

0x26

Local temperature reading (8 MSB of reading).

0x27

Remote 2 temperature reading (Notes 12, 13) (8 MSB of reading).

10.If the extended resolution bits of these readings are also being read, the extended resolution registers (Reg. 0x76, 0x77) must be read first.

Once the extended resolution registers have been read, all associated MSB reading registers are frozen until read. Both the extended

resolution registers and the MSB registers are frozen.

11.These temperature readings can be in twos complement or offset 64 format; this interpretation is determined by Bit 0 of Configuration Register

5 (0x7C).

12.In twos complement mode, a temperature reading of 128癈 (0x80) indicates a diode fault (open or short) on that channel.

13.In offset 64 mode, a temperature reading of 64癈 (0x00) indicates a diode fault (open or short) on that channel.

Table 52. FAN TACHOMETER READING REGISTERS (PowerOn Default = 0x00) (Note 14)

R/W

Description

0x28

TACH1 low byte.

0x29

TACH1 high byte.

0x2A

TACH2 low byte.

0x2B

TACH2 high byte.

0x2C

TACH3 low byte.

0x2D

TACH3 high byte.

0x2E

TACH4 low byte.

0x2F

TACH4 high byte.

14.These registers count the number of 11.11 ms periods (based on an internal 90 kHz clock) that occur between a number of consecutive fan

TACH pulses (default = 2). The number of TACH pulses used to count can be changed using the fan pulses per revolution register (Reg.

0x7B). This allows the fan speed to be accurately measured. Because a valid fan tachometer reading requires that two bytes be read, the

low byte must be read first. Both the low and high bytes are then frozen until read. At poweron, these registers contain 0x0000 until the first

valid fan TACH measurement is read into these registers. This prevents false interrupts from occurring while the fans are spinning up.

A count of 0xFFFF indicates that a fan is one of the following: stalled or blocked (object jamming the fan), failed (internal circuitry destroyed),

or not populated. (The NCT7491 expects to see a fan connected to each TACH. If a fan is not connected to that TACH, its TACH minimum

high and low bytes should be set to 0xFF.)

Table 53. CURRENT PWM DUTY CYCLE REGISTERS (PowerOn Default = 0xFF) (Note 15)

R/W

Description

0x30

R/W

PWM1 current duty cycle (0% to 100% duty cycle = 0x00 to 0xFF).

0x31

R/W

PWM2 current duty cycle (0% to 100% duty cycle = 0x00 to 0xFF).

0x32

R/W

PWM3 current duty cycle (0% to 100% duty cycle = 0x00 to 0xFF).

15.These registers reflect the PWM duty cycle driving each fan at any given time. When in automatic fan speed control mode, the NCT7491

reports the PWM duty cycles back through these registers. The PWM duty cycle values vary according to temperature in automatic fan speed

control mode. During fan startup, these registers report back 0x00. In manual mode, the PWM duty cycle outputs can be set to any duty cycle

value by writing to these registers.

Table 54. REGISTER 0x33 PECI0 READING REGISTER (PowerOn Default = 0x80)

R/W

Description

0x33

PECI0: This register reads the 8 bits representative of PECI Client Address stored in register 0x00

Table 55. PECI LIMIT REGISTERS REGISTER

R/W

Description

PowerOn Default

0x34

R/W

PECI Low Limit

0x81

0x35

R/W

PECI High Limit

0x00

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

采购需求

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

我的联系方式